학술논문
SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs
Document Type
Periodical
Author
Source
IEEE Design & Test IEEE Des. Test Design & Test, IEEE. 40(6):64-75 Dec, 2023
Subject
Language
ISSN
2168-2356
2168-2364
2168-2364
Abstract
Editor’s notes: This article introduces a novel debug unit enabling compositional postsilicon validation of heterogeneous SoCs. The unit’s effectiveness is demonstrated in post-silicon validation by integrating it into a 12-nm complex SoC prototype. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India