학술논문
FinFET Plus: A Scalable FinFET Architecture with 3D Air-Gap and Air-Spacer Toward the 3nm Generation and Beyond
Document Type
Conference
Author
Source
2021 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) VLSI Technology, Systems and Applications (VLSI-TSA), 2021 International Symposium on. :1-2 Apr, 2021
Subject
Language
Abstract
A new improvement of FinFET has been demonstrated in the extension of the Moore’s Law toward N3 technology and beyond. Instead of conventional STI, the approach is to use air-trench-isolation (ATI) between fins such that, in the width direction, inter-fin spaces with air-gap in the active region become scalable. The scalable ATI FinFET exhibits better DC and RF performance. Results show that the parasitic C gd reduces 2.3x, and I on enhances 6.5x; short-channel control is also much better than the conventional ones. Also, along channel direction, air-spacer between gate and S/D has been adopted to further reduce the parasitic capacitance. For a benchmark, in comparison to the conventional FinFET, the propagation delay with 55.8% reduction, active power reduction of 54%, and operating frequency range up to 1.43x gain can be achieved at N3 technology node.