학술논문

Nonprime memory systems and error correction in address translation
Document Type
Periodical
Author
Source
IEEE Transactions on Computers IEEE Trans. Comput. Computers, IEEE Transactions on. 46(1):75-79 Jan, 1997
Subject
Computing and Processing
Error correction
Computer errors
Bandwidth
Vector processors
Cathode ray tubes
Fault detection
Distributed computing
Arithmetic
Built-in self-test
Fault tolerant systems
Language
ISSN
0018-9340
1557-9956
2326-3814
Abstract
Using a prime number p of memory banks on a vector processor allows a conflict-free access for any slice of p consecutive elements of a vector stored with a stride not multiple of p. To reject the use of a prime number of memory banks, it is generally advanced that address computation for such a memory system would require systematic Euclidean division by the number p. The Chinese Remainder Theorem allows a simple mapping of data onto the memory banks for which address computation does not require any Euclidean division. However, this requires that the number of words in each memory module m and p be relatively prime. We propose a method based on the Chinese Remainder Theorem for moduli with common factors that does not have such a restriction. The proposed method does not require Euclidean division and also results in an efficient error detection/correction mechanism for address translation.