학술논문

The readout electronics of the Micromegas-based large time projection chamber prototype for the International Linear Collider
Document Type
Conference
Source
2012 18th IEEE-NPSS Real Time Conference Real Time Conference (RT), 2012 18th IEEE-NPSS. :1-5 Jun, 2012
Subject
Nuclear Engineering
Power, Energy and Industry Applications
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
General Topics for Engineers
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Detectors
Field programmable gate arrays
Universal Serial Bus
Prototypes
Connectors
Hardware
Data acquisition
Language
Abstract
This work presents the design, implementation and test of prototype modules of a Time Projection Chamber based on Micromegas amplification technology which was built in view of the future International Linear Collider. The main goals of this development are to investigate the performance of the detector and to demonstrate the feasibility of extremely compact and low power readout electronics. We based the front-end electronics on the AFTER chip, a 72-channel ASIC originally built for the T2K experiment, and integrated it with new hardware, mechanics and cooling to read out the 1728 channels of a detector module while staying confined in the available area of ∼220 cm 2 . The digital part of a module is based on a Xilinx Virtex-5 FPGA which interfaces to the 24 AFTER chips used for the readout. We present the operation of a vertical slice of the complete detector and readout system. In particular, our tests show that the resistive anode of the Micromegas detector, which is primarily designed to improve tracking resolution, allows operation without the spark protection circuit normally required on each readout channel.