학술논문

An Implementation of KFDD based Reversible Logic using IBM-Q Experience
Document Type
Conference
Source
2020 7th International Conference on Computing for Sustainable Global Development (INDIACom) Computing for Sustainable Global Development (INDIACom), 2020 7th International Conference on. :162-167 Mar, 2020
Subject
Aerospace
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineering Profession
General Topics for Engineers
Geoscience
Nuclear Engineering
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Transportation
KFDD (Kronecker functional decision diagram)
reversible gates
reversible circuits
CNOT (Controlled NOT)
decision diagram
Language
Abstract
Reversible logic is a circuit which has the ability to reduce the power dissipation. This type of logic circuit is used for the process of running the system both forward and backward.One of the main advantages of using any reversible logic is to get back the original data and to reduce the garbage output. Logic synthesis based on the Kronecker Functional Decision Diagram (KFDD) are generated for different reversible cascade methods both complemented and uncomplemented edge by using different reversible gates such as the CNOT (Controlled NOT), NOT, Toffoli gates, Peres gates, etc., and implemented in a quantum processor. In order to reduce the qubits which in turn reduces the quantum cost, it is implemented using reversible logic synthesis in KFDD method.The proposed method shows the implementation of these reversible circuits in an IBM quantum computer to find the probabilities, as it gives less quantum cost and also consumes less time when compared to other decision diagram. Reversible logic finds a wide range of applications in quantum computing and also in areas which deals with the low power design.This paper presents the implementation of KFDD using quantum circuits in IBM Quantum (IBM-Q) processor using different reversible logics and the output is discussed.