학술논문

Drift Compensation in Multilevel PCM for in-Memory Computing Accelerators
Document Type
Conference
Source
2024 IEEE International Reliability Physics Symposium (IRPS) International Reliability Physics Symposium (IRPS), 2024 IEEE. :1-4 Apr, 2024
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Engineering Profession
Phase change materials
Annealing
Limiting
Switches
Programming
In-memory computing
Phase change memory
phase change memory
in-memory computing
multilevel cell
drift compensation
neural networks accelerator
Language
ISSN
1938-1891
Abstract
Phase change memory (PCM) has emerged as a scalable, reliable technology for high-temperature environments, demonstrated for consumer- and automotive-grade applications with Ge-rich GeSbTe (GST). However, critical challenges for PCM are variability and drift, limiting the precision of the multilevel cell (MLC) and thus the accuracy of in-memory computing (IMC) accelerators. This work presents a novel multilevel programming scheme based on gradual crystallization from weak reset, which improves the programming precision by preventing instabilities at threshold switching. This precise MLC-PCM is adopted in a differential cell, capable of inherent drift compensation. Results are validated by matrix-vector multiplication (MVM) on a 20 kb test chip, showing excellent accuracy even after annealing up to 1 day at 180°C.