학술논문

FPGA-based SiPM Timestamp Detection Setup for High Timing Resolution TOF-PET Application
Document Type
Conference
Source
2021 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC) Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2021 IEEE. :1-5 Oct, 2021
Subject
Communication, Networking and Broadcast Technologies
Nuclear Engineering
Signal Processing and Analysis
Photomultipliers
Scintillators
Gamma-rays
Detectors
Crystals
Logic gates
Synchronization
Time-to-Digital Converter (TDC)
Silicon Photomultiplier (SiPM)
Field Programmable Gate Array (FPGA)
Scintillator
Constant Fraction Discriminator (CFD)
Time-of-Fight (TOF)
Language
ISSN
2577-0829
Abstract
High timing resolution is an important parameter of sensors and detectors used in many fields like particle and medical physics. Commercial Positron Emission Tomography (PET) scanners use detectors made of inorganic scintillator instrumented with photodetectors like Photomultiplier Tubes (PMTs) and Silicon Photomultipliers (SiPMs). The use of high granularity gamma-ray cameras in PET scanners for high quality imaging comes with a significant rise of the number of read-out channels. For this reason, compact data acquisition systems able to keep a high timing resolution are required. With this aim, in this work we propose a digital and reconfigurable high-resolution timestamp detection setup and real-time processing system based on Field Programmable Gate Array (FPGA). In particular, we present the measurements of Coincidence Time Resolution (CTR) of prompt gamma-rays emitted by a 22 Na source and detected by two single LYSO crystals coupled to analog SiPMs. In order to reduce up to tens of picoseconds the otherwise nanoseconds time-walk error which is due to the distribution of the scintillator emission time, the signals from the SiPMs are converted into digital pulses by means of Constant Fraction Discriminators (CFDs) and sent to a read-out board where the timestamping and processing algorithms, i.e. histogramming and time-tagging, are implemented on a Xilinx 28-nm 7-Series Artix-7 100T FPGA. The board is a compact system, featuring three overall channels, among which one might be used for advanced synchronization purposes. The timestamp generation is computed by an high-performance fully-FPGA based Time-to-Digital Converter (TDC) with a resolution (LSB) of 36.6 ps and a single-shot channel precision up to 12 ps r.m.s. over an extended dynamic-range. In this manner, a CTR of hundreds of picoseconds, comparable with the state-of-the-art, is achieved.