부산대학교 도서관

This article presents a radiation tolerant charge-pump phase-locked loop (PLL) with low static phase error variability suitable for high-performance clock systems in high-dose radiation environments. We investigate the use of source switching charge-pump architectures to minimize any voltage- or dose-dependent charge injection and address the limitations of enclosed layout transistors (ELTs) in the conventional drain switched charge-pump. The circuit has been processed in a 65-nm complementary metal–oxide–semiconductor (CMOS) technology and has been experimentally verified with X-rays up to a total ionizing dose of 180 Mrad.