학술논문

Graph Coordination for Compact Representation of Regular Dataflow Structures
Document Type
Conference
Source
2020 IEEE Workshop on Signal Processing Systems (SiPS) Signal Processing Systems (SiPS), 2020 IEEE Workshop on. :1-6 Oct, 2020
Subject
Components, Circuits, Devices and Systems
Computing and Processing
Signal Processing and Analysis
Switches
Indexes
Signal processing
Machine learning
Biological neural networks
Structural rings
Program processors
Dataflow
Graph Coordination
Language
ISSN
2374-7390
Abstract
Dataflow modelling languages are highly effective for creating efficient implementations of signal processing operations on embedded and edge computing devices. However, they lack general constructs to compactly describe regular scalable structures, as required by modern large-scale signal processing and machine learning operations. This paper describes a framework to do that. It extends the Processing Graph Method coordination language with a switch construct which allows scalable, regular connectivity to be compactly expressed for compile-time analysis and elaboration. It shows how switches can merge, split and permute groups of connections and can express recognised topological structures — such as chains, rings, butterflys and multicast operations — despite its general nature. It is applied to the description of large-scale FFT and Artificial Neural Network (ANN) operators.