학술논문
Modeling and simulation of core switching noise on a package and board
Document Type
Conference
Author
Source
2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220) Electronic components and technology Electronic Components and Technology Conference, 2001. Proceedings., 51st. :1095-1101 2001
Subject
Language
ISSN
0569-5503
Abstract
This paper presents simulation and analysis of core switching noise on a CMOS test vehicle. The test vehicle consists of a ceramic ball grid array (CBGA) package on a printed circuit board (PCB). The entire test vehicle has been modeled by accounting for all the plane resonances using the cavity resonator method. The models included both the on-chip and off-chip decoupling capacitors. Using both time domain and frequency domain simulations, the role of plane resonances on power supply noise for fast current edge rates has been discussed. The models have been constructed to amplify certain parts of the test vehicle during simulations.