학술논문
Exploring manufacturability of novel 2D channel materials: 300 mm wafer-scale 2D NMOS & PMOS using MoS2, WS2, & WSe2
Document Type
Conference
Author
Dorow, C. J.; Schram, T.; Smets, Q.; O'Brien, K. P.; Maxey, K.; Lin, C.-C.; Panarella, L.; Kaczer, B.; Arefin, N.; Roy, A.; Jordan, R.; Oni, A.; Penumatcha, A.; Naylor, C. H.; Kavrik, M.; Cott, D.; Graven, B.; Afanasiev, V.; Morin, P.; Asselberghs, I.; Lockhart de La Rosa, C. J.; Sankar Kar, G.; Metz, M.; Avci, U.
Source
2023 International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2023 International. :1-4 Dec, 2023
Subject
Language
ISSN
2156-017X
Abstract
Rapid progress in fundamental understanding and development of 2D channel materials has yielded significant advances in contact resistance, gate oxide quality, and channel mobility, revealing opportunities for the future of Moore’s Law using highly-scaled 2D CMOS. We now scale up to 300 mm, for the first time, both NMOS and PMOS 2D transistors using today’s leading TMD candidates: MoS 2 , WS 2 , and WSe 2 . Our MoS 2 outperforms WS 2 as NMOS transistor due to higher mobility and lower contact resistance. WSe 2 multi-layers show high PMOS on-currents up to 200 μA/μm for larger grain size films. Larger TMD grain sizes outperform smaller grains for both NMOS and PMOS with up to 10× higher on-currents and steeper SS, identifying single crystal mono-layer channel uniformity as a paramount obstacle toward performance enhancement and reduced variation.