학술논문
Case of via resistance increase during thermal cycle
Document Type
Conference
Author
Source
2004 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop (IEEE Cat. No.04CH37530) Advanced semiconductor manufacturing Advanced Semiconductor Manufacturing, 2004. ASMC '04. IEEE Conference and Workshop. :162-164 2004
Subject
Language
Abstract
We report on a case of via resistance increase after process induced thermal cycles. Evidence of volume expansion at via bottom is shown on cross sections, with complete disconnect between the W plug and ARC TiN in worst case. The problem is traced to interaction between Fluorine implanted into TiN ARC during the oxide overetch step and Ti portion of the via liner. When liner Ti is treated by N/sub 2/ plasma prior to CVD TiN deposition, the problem is reduced.