학술논문
Enhanced Performance in Epitaxial Graphene FETs With Optimized Channel Morphology
Document Type
Periodical
Author
Source
IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 32(10):1343-1345 Oct, 2011
Subject
Language
ISSN
0741-3106
1558-0563
1558-0563
Abstract
This letter reports the impact of surface morphology on the carrier transport and radio-frequency performance of graphene FETs formed on epitaxial graphene synthesized on SiC substrates. Such graphene exhibits long terrace structures with widths between 3–5 $\mu\hbox{m}$ and steps of 10 $\pm$ 2 nm in height. While a carrier mobility value above 3000 $\hbox{cm}^{2}/\hbox{V}\cdot\hbox{s}$ at a carrier density of $\hbox{10}^{12}\ \hbox{cm}^{-2}$ is obtained in a single graphene terrace, the step edges can result in a step resistance of $\sim\!\! \hbox{21}\ \hbox{k}\Omega\cdot\mu\hbox{m}$. By orienting the transistor layout so that the entire channel lies within a single graphene terrace and by reducing the access resistance associated with the ungated part of the channel, a cutoff frequency above 200 GHz is achieved for graphene FETs with channel lengths of 210 nm, i.e., the highest value reported on epitaxial graphene thus far.