부산대학교 도서관

An ultrahigh density 3D technology, SoIC_UHD, with sub-micron pitch inter-chip vertical interconnect enabling a density ≥ 1.2 million bonds/mm 2 is reported for the first time. Proven yield and reliability of SoIC_UHD are demonstrated with a foundry front-end wafer level 3D heterogeneous system integration (WLSI) platform. SoC deep partitioning into mini chiplets with SoIC_UHD can extend Moore's Law for longer term than that achieved by conventional 3DIC stacking with micro-bumps. Microsystem scaling, which is complementary to transistor scaling, can continue to improve transistor density, system PPA, and cost competitiveness.