학술논문

Herringbone-Based TSV Architecture for Clustered Fault Repair and Aging Recovery
Document Type
Periodical
Source
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 41(4):1142-1153 Apr, 2022
Subject
Components, Circuits, Devices and Systems
Computing and Processing
Through-silicon vias
Maintenance engineering
Circuit faults
Hardware
Computer architecture
Switches
Reliability
Aging
reliability
repair
three-dimensional integrated circuits (3-D ICs)
through-silicon via (TSV)
yield enhancement
Language
ISSN
0278-0070
1937-4151
Abstract
Three-dimensional integrated circuits (3-D ICs) utilizing through-silicon via (TSV) technology have many advantages over 2-D ICs, including high bandwidth, high density, and low power consumption. However, TSV, which is a key feature of 3-D ICs, has not only problems due to defects in the manufacturing process but also potential problems due to aging. Various solutions have been proposed to address each of these issues, but no one solution has been proposed considering both. In practice, to improve the overall reliability of the TSV, the two problems should be solved together, not separately. In this article, a new TSV architecture is proposed to cope with both issues. The proposed TSV architecture uses redundant TSVs (RTSVs) to repair faulty TSVs due to manufacturing defects and uses unused RTSVs in this way to solve the aging-related problems. Experimental results show that the proposed architecture achieves similar repair rate with less than 1% difference in less than six clustered faults using smaller hardware overhead, and also shows that unused RTSVs are available with a 98.5% high probability, resulting in a 1.5 times improvement in lifetime.