학술논문

Low-Voltage CMOS Bulk-Driven Buffer With Bootstrapping Technique for Gain Enhancement and THD-Noise Reduction
Document Type
Conference
Source
2022 37th Conference on Design of Circuits and Integrated Circuits (DCIS) Design of Circuits and Integrated Circuits (DCIS), 2022 37th Conference on. :01-04 Nov, 2022
Subject
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Power, Energy and Industry Applications
Resistors
MOSFET
Power demand
Simulation
Capacitors
Linearity
Voltage
Bootstrapping
bulk-driven
linearized transconductor
quasi-floating gates
Language
ISSN
2640-5563
Abstract
In this paper, a bootstrapping technique is applied to a bulk-driven voltage buffer for canceling the gate-source transconductance in order to improve the cell gain, the linearity and reduce the input-referred noise. The bootstrapped circuitry is conveniently implemented by only using a capacitor and a pseudo resistor. The suitability of the technique is demonstrated by simulation results using a flipped voltage follower, even though it is general and can be applied to other structures. A 1-V buffer is designed in 0.18 µm CMOS technology, showing a 4.3 times improvement in the voltage gain (conventional 0.21 V/V, bootstrapped 0.90 V/V), increasing 5 times the input voltage range for a 1% THD (conventional 50 mV, bootstrapped 250 mV) and reducing the input equivalent noise around a 16% (conventional 180 nV/-√Hz, bootstrapped 155 nV/√Hz at 10 kHz).