학술논문

Data Analytics and Machine Learning for Design-Process-Yield Optimization in Electronic Design Automation and IC semiconductor manufacturing
Document Type
Conference
Source
2017 China Semiconductor Technology International Conference (CSTIC) Semiconductor Technology International Conference (CSTIC), 2017 China. :1-3 Mar, 2017
Subject
Bioengineering
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Photonics and Electrooptics
Data analysis
Manufacturing
IP networks
Layout
Algorithm design and analysis
Language
Abstract
In response to the current challenges of end-of-Moore scaling, a systematic analysis of the data information flows in the Design-to-Manufacturing pipeline highlights opportunities for the introduction of (big) data analytics and machine learning solutions. In this paper we review the eco-system components and describe the fundamental data-flows in the IC Design-to-Manufacturing chain, highlighting both the well-established and functioning sub-systems, as well as the critical bottlenecks. A quantitative definition of physical design space coverage is proposed, as the unifying abstraction available for all components of the Design-to-Manufacturing flow, allowing for the construction of a computational framework where Data Analytics and Machine Learning methodologies and tools can be successfully applied. The juxtaposition of Design-Technology-Co-Optimization (DTCO) with the novel paradigm of DFM-as-Search and their necessary integration in the DFM computational toolkit, clearly exemplify how the all the advanced IC nodes (14, 10, 7 and 5nm) definitely require the adoption of a new class of correlation extraction algorithms for heterogeneous data sets.