학술논문

A Compact High-Isolation V-Band Millimeter Wave Wilkinson Power Divider Design in 65-nm CMOS Process
Document Type
Conference
Source
2023 International Conference on Microwave and Millimeter Wave Technology (ICMMT) Microwave and Millimeter Wave Technology (ICMMT), 2023 International Conference on. :1-3 May, 2023
Subject
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Signal Processing and Analysis
Power dividers
Microwave integrated circuits
Power transmission lines
Three-dimensional displays
Propagation losses
Microwave circuits
CMOS process
Wilkinson power divider
on-chip transmission line
power combiner
monolithic microwave integrated circuits
millimeter-wave CMOS design
mm-wave ICs
V-band
Language
Abstract
Slim on-chip transmission lines of a quasi-rectangular coaxial structure are used to construct a 2-way Wilkinson power divider for millimeter-wave integrated circuits (ICs) in the V-band. With the ground-shielding metal layers surrounding the central core, a meandered design is adopted for the two quarter-wavelength transmission line segments and makes the power divider very compact. It also provides very high signal isolation from neighbouring devices and the resistive semiconductor substrate. In a 65-nm CMOS process, the power divider design occupies a chip area of only 285 × 67 μm 2 (≈ 0.019 mm 2 ). A low power loss and a very high isolation between the output ports are maintained in a frequency range from 50 to 75 GHz, achieving |S 21 | = -3.95 dB (with the 3 dB power division loss included), |S 23 | = -29 dB and |S 11 | = -29.5 dB, all at 60 GHz.