학술논문

A 40nm CMOS Ultra-Wideband Active Power Divider/Combiner Design
Document Type
Conference
Source
2020 IEEE 3rd International Conference on Electronics Technology (ICET) Electronics Technology (ICET), 2020 IEEE 3rd International Conference on. :266-270 May, 2020
Subject
Photonics and Electrooptics
Robotics and Control Systems
Power transmission lines
Simulation
Layout
Insertion loss
Frequency conversion
Passive circuits
Topology
CMOS
ultra-wideband
power divider
power combiner
bidirectional
Language
Abstract
An ultra-wideband active power divider/combiner based on cascode bidirectional amplifier (BDA) is presented in this paper. The lumped inductors and the parasitic capacitances in the transistors constitute the artificial transmission lines. The proposed circuit utilizes a three-stage bidirectional amplifier topology to achieve broadband operation. In this paper, the SMIC 40nm CMOS process is used. The simulation results of the two-way power divider/combiner circuit show that the return loss S11, S22 and S33 are lower than -10dB, and the gain S21 is around 1.3-7.2 dB, and the maximum isolation S23 is about -60dB in the 50.470.4GHz frequency range. By cascading two-way power dividers/combiners, the eight-way power divider/combiner can be formed. According to the simulation results, the cascaded circuit also has good gain and isolation in the 50.4-70.4 GHz frequency range, and the maximum gain can reach 21dB.