학술논문

Area reduction of millimeter-wave CMOS amplifier using narrow transmission line
Document Type
Conference
Source
Asia-Pacific Microwave Conference 2011 Microwave Conference Proceedings (APMC), 2011 Asia-Pacific. :797-800 Dec, 2011
Subject
Fields, Waves and Electromagnetics
Engineered Materials, Dielectrics and Plasmas
Components, Circuits, Devices and Systems
Computing and Processing
Power transmission lines
Transmission line measurements
Power generation
Gain
Power measurement
Impedance
Gain measurement
Transmission line
60 GHz
CMOS
power amplifiers
Language
ISSN
2165-4727
2165-4743
Abstract
This paper presents small-area 60 GHz amplifiers using narrow transmission line. All the circuits presented by the authors were designed using narrow transmission line with a 6 µm signal line width. Because the phase constant of a narrow transmission line is larger, impedance matching is achieved using a much shorter line length compared with matching using a wider transmission line. Single-stage amplifiers utilizing narrow and wide transmission lines were fabricated and compared in 65nm CMOS process. Use of narrow transmission lines can reduce layout area by 60% while achieving a measured power gain of 6.54 dB, a measured output power at 1 dB compression point of 4.35dBm and a measured saturated output power of 8.0 dB.