부산대학교 도서관

Injection locking technique can effectively increase loop bandwidth of Phase Locked Loop (PLL)without introducing stability issues. However, the capture range of injection locking PLL (ILPLL) are limited to 1/2 • Fref due to its inherent phase alignment method, which need an additional power hungry frequency tracking loop (FLL) to address the issue. This paper presents that a frequency-voltage converter based FLL makes it possible for ILPLLs to lock with any initial frequency. To extract the frequency information of the output signal, a low power capacitor-charged FVC is design instead of traditional charge pump. Combined the pulse swallower counter, the proposed ILPLL can be locked over the entire tuning range of the oscillator. The circuit is designed on a 40nm CMOS process. The simulation results shows that the proposed FLL consumes 5.7mW and its locking time less than 1us which is more power efficiency compared to the previous FLLs. The simulated reference spur and phase noise were -45 dBc and -124.3 dBc/Hz at 1MHz with 2.2-GHz output frequency.