부산대학교 도서관

Heterogeneous Integration (HI) of chiplets offers diverse functionalities and enhanced performance within compact packaging by assembling chiplets sourced from different foundries into one substrate via 2.5D/3D advanced packaging techniques. However, an adversarial foundry, with complete access to the chiplet layout and test vectors, could maliciously modify the design with hardware Trojans, compromising the security of the System-in-Package (SiP). In this paper, we introduce the Chiplet Physical Inspection Certification Authority (ChiPICA) to ensure the trustworthiness of chiplets by validating Scanning Electron Microscopy (SEM) images of the chiplet’s backside against the layout of the active layer on individual logic cells using Fourier Shape Descriptor-based shape matching. Additionally, the proposed framework only requires the design house to provide shape descriptor values for individual logic cells in the form of a shape packet list, which protects the intellectual property of the chiplet designer. A fast verification algorithm that operates on the shape packet list, along with a pipelined implementation that achieves an average speed up of approximately 6.5x compared to previous method is also proposed in this paper.