학술논문

Strained silicon substrate technologies for enhancement of transistor performance
Document Type
Article
Source
Journal of Ceramic Processing Research, 5(3), pp.261-263 Sep, 2004
Subject
재료공학
Language
ISSN
2672-152X
1229-9162
Abstract
Strain-induced improvement of electron or hole mobility is a very attractive way of enhancing the speed performance of integrated circuits in addition to device scaling. This paper reviews several promising substrate technologies for the exploitation of strain-induced effects. Strained silicon substrates incorporating layer structures such as strained-Si on a relaxed SiGe buffer layer, strained-Si-on-insulator, and strained-Si/SiGe-on-insulator, are examined. Technical challenges for these substrate technologies are investigated, and their relative merits are compared.