학술논문
Gate-last integration on planar FDSOI for low-VTp and low-EOT MOSFETs
Document Type
Article
Author
Morvan, S.; Andrieu, F.; Leroux, C.; Garros, X.; Cassé, M.; Martin, F.; Gassilloud, R.; Morand, Y.; Le Royer, C.; Besson, P.; Roure, M.-C.; Euvrard, C.; Rivoire, M.; Seignard, A.; Desvoivres, L.; Barnola, S.; Allouti, N.; Caubet, P.; Weber, U.; Baumann, P.K.; Weber, O.; Tosti, L.; Perreau, P.; Ponthenier, F.; Ghibaudo, G.; Poiroux, T.
Source
In Microelectronic Engineering September 2013 109:306-309
Subject
Language
ISSN
0167-9317