학술논문
Vertically stacked-NanoWires MOSFETs in a replacement metal gate process with inner spacer and SiGe source/drain
Document Type
Conference Paper
Author
Barraud, S.; Lapras, V.; Gaben, L.; Grenouillet, L.; Maffini-Alvaro, V.; Daranlot, J.; Rambal, N.; Previtalli, B.; Reboh, S.; Tabone, C.; Coquand, R.; Augendre, E.; Rozeau, O.; Hartmann, J.M.; Vizioz, C.; Pimenta-Barros, P.; Posseme, N.; Loup, V.; Euvrard, C.; Balan, V.; Tinti, I.; Audoit, G.; Bernier, N.; Cooper, D.; Saghi, Z.; Allain, F.; Toffoli, A.; Faynot, O.; Vinet, M.; Samson, M.P.; Morand, Y.; Arvet, C.; Comboroure, C.
Source
In: Technical Digest - International Electron Devices Meeting, IEDM , 2016 IEEE International Electron Devices Meeting, IEDM 2016. (Technical Digest - International Electron Devices Meeting, IEDM, 31 January 2017, :17.6.1-17.6.4)
Subject
Language
English
ISSN
01631918