학술논문
Complementary high voltage MOSFETs using a modified standard CMOS process
Document Type
Conference
Author
Source
2003 International Semiconductor Conference. CAS 2003 Proceedings (IEEE Cat. No.03TH8676) Semiconductor conference. CAS 2003 Semiconductor Conference, 2003. CAS 2003. International. 2:263-266 Vol. 2 2003
Subject
Language
Abstract
This paper presents a new high voltage technology for power integrated circuits using standard low cost 2.5 /spl mu/m CMOS technology and oriented for digital applications, with only one extra processing step. Lateral N- and P-MOSFET transistors have been optimized using 2D simulators attending both specific on-resistance and breakdown voltage. Lateral double diffused n-channel transistors with breakdown voltage of 160V (R/sub on/= 13.5m/spl Omega//spl middot/cm/sup 2/) have been achieved. Extended drain P-MOSFET transistors with low on-resistance and breakdown voltage of 36V (R/sub on/=2.0m/spl Omega//spl middot/cm/sup 2/) have been also implemented.