학술논문
Comparison of Delay Tests on Silicon
Document Type
Conference
Author
Source
2006 IEEE International Test Conference Test Conference, 2006. ITC '06. IEEE International. :1-10 Oct, 2006
Subject
Language
ISSN
1089-3539
2378-2250
2378-2250
Abstract
Testing longer paths in an integrated circuit with a proper path selection strategy has the potential to increase the quality of a delay test. However, the benefit on silicon is not completely clear because a theoretical test quality increase is normally simulated using an assumed distribution of defect sizes. In this work, silicon data is collected and maximum operating frequency (Fmax) compared using test patterns generated by a variety of delay test methodologies. The silicon data is consistent with theoretical predictions and the benefits of testing delay faults through the longest path are quantified.