학술논문

Performance and Reliability of 4 Mb eFLASH Memory Array Featuring 28 nm Split-Gate Cell with HKMG Select Transistor
Document Type
Conference
Source
2020 IEEE International Memory Workshop (IMW) Memory Workshop (IMW), 2020 IEEE International. :1-4 May, 2020
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Degradation
Microprocessors
Conferences
Metals
Computer architecture
Logic gates
Split gate flash memory cells
ESF3
split-gate flash cell
floating gate
HKMG
Language
ISSN
2573-7503
Abstract
This paper presents the characterization and reliability results achieved on 1.8 V 4 Mb flash array built around 3rd generation Embedded SuperFlash® (ESF3) memory cell featuring high-k metal gate (HKMG) select transistor and embedded into Low-Power 28 nm CMOS HKMG technology with gate-first architecture. Endurance shows better performance in terms of erase degradation as compared to prior technology nodes with poly-SiON select transistor. This improvement is attributed to HKMG-related process integration scheme allowing to reduce the effect of the CMOS baseline on tunnel oxide quality. Excellent program-erase performance, program disturb windows and data retention capability are observed.