학술논문

A wideband programmable hybrid continuous-time/discrete-time equalizer with asymmetric frequency response in 28 nm CMOS
Document Type
Conference
Source
2017 IEEE Asia Pacific Microwave Conference (APMC) Microwave Conference (APMC), 2017 IEEE Asia Pacific. :922-925 Nov, 2017
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Photonics and Electrooptics
Equalizers
Frequency response
Gain
Clocks
Wideband
Capacitors
Prototypes
Equalizer
Continuous time system
Discrete time system
wideband
millimeter-wave
Language
Abstract
This paper presents a programmable wideband equalizer with hybrid Continuous-Time (CT)/Discrete-Time (DT) architecture. Unlike the conventional hybrid CT/DT circuit, the proposed architecture shares the charge between I path and Q path, enabling to achieve asymmetric frequency response. A prototype has been fabricated in 28 nm CMOS. The proposed equalizer achieves 1.6 GHz wideband asymmetric frequency response with capacitance ratio (C ratio) and clock frequency (f CK ) programmability. The proposed equalizer occupies only 0.042 mm 2 of active area.