부산대학교 도서관

In this paper, we propose a new test circuit which connects the interconnect test element and a variable-resistor in a voltage-divider structure, using an inverted-inverter as a delay element, to overcome the limitations of the conventional ring-oscillator, which is commonly used for process monitoring. Simulation results demonstrate that the proposed circuit, compared to the conventional one, achieves a six-fold reduction in area and significantly enhances the sensitivity for detecting delays caused by interconnect resistance and capacitance, improving them by 12 and 3.6 times, respectively. We anticipate that this circuit will find applications in areas vulnerable to interconnect RC delay, such as 3-dimensional system packages.