학술논문

Floating Point Implementation of FFT Using a Novel ESL Design Flow
Document Type
Conference
Source
2009 Fourth International Conference on Innovative Computing, Information and Control (ICICIC) Innovative Computing, Information and Control (ICICIC), 2009 Fourth International Conference on. :664-666 Dec, 2009
Subject
Communication, Networking and Broadcast Technologies
Computing and Processing
Algorithm design and analysis
Delay
Power system modeling
Engines
Synthesizers
Libraries
Yarn
Hardware
Digital signal processing
Automatic control
Language
Abstract
To demonstrate the benefit of Electronic System Level (ESL) methodology, the development of scalar and parallel FFT engine is presented using a novel ESL design flow in this paper. A novel design flow was detailed firstly. In this design flow, a 32-bit IEEE-754 datapath was implemented. A parallelizing technique is also presented to utilize the inherent parallelism in the algorithm. According to the importance of the FFT algorithm, scalar and parallel FFT engines are developed using this design flow to demonstrate the benefit of ESL methodolog.