학술논문

Error and Correction in Capacitance–Voltage Measurement Due to the Presence of Source and Drain
Document Type
Periodical
Source
IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 28(7):640-642 Jul, 2007
Subject
Engineered Materials, Dielectrics and Plasmas
Components, Circuits, Devices and Systems
Error correction
Capacitance measurement
Dielectric measurements
Reflection
Circuit testing
MOS capacitors
Current measurement
Electrical resistance measurement
Voltage
MOSFETs
Capacitance
%24C%24+<%2Ftex><%2Fformula>–%24V%24<%2Ftex><%2Fformula>%29%22">capacitance–voltage ($C$ $V$)
leakage
time domain reflectrometry
Language
ISSN
0741-3106
1558-0563
Abstract
MOS capacitor with highly leaky gate dielectric requires source and drain to support the inversion charges. This transistor-like capacitor for capacitance–voltage ($C$ –$V$) measurement has become popular due to the need of accurately measuring inversion capacitance. The source and drain overlap capacitance is an unavoidable error and must be quantified. Although it is possible to measure the overlap capacitance directly, conventional method is not reliable due to high leakage. Here, we show that this error can be corrected in the new time-domain-reflectometry $C$–$V$ measurement method introduced recently for highly leaky capacitors.