학술논문
Concurrent error detection in semi-systolic dual basis multiplier over GF(2m) using self-checking alternating logic.
Document Type
Article
Author
Source
IET Circuits, Devices & Systems (Institution of Engineering & Technology); Sep2010, Vol. 4 Issue 5, p382-391, 10p, 7 Diagrams, 4 Charts
Subject
Language
ISSN
1751858X
Abstract
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